The present invention generally relates semiconductor devices, and more particularly, to wafer-level chip scale package with side protection, and a method for making such a semiconductor device.
A typical semiconductor device includes a device die and molding material that covers the device die. The molding material protects the device die from environmental stresses, such as mechanical damage, moisture, etc. Wafer-Level Chip Scale Package (WLCSP) refers to the technology of packaging an integrated circuit (IC) at the wafer level, instead of the traditional process of assembling individual dies in packages after dicing the dies from a wafer. WLCSP is an extension of the wafer fab process, where the device interconnects and protection is accomplished using the traditional fab processes and tools. In the final form, the device is a die with an array pattern of bumps or solder balls attached at an I/O pitch that is compatible with traditional circuit board assembly processes. WLCSP is a true chip-scale packaging (CSP) technology, since the resulting package is about the same size as the die. In assembling a WLCSP, molding material is deposited on the backside of a wafer and then the wafer is singulated. Thus, although the backside of the die is protected by molding material, the lateral side walls and the front side are not, such that the WLCSP device is susceptible to being damage, e.g., chipping, which may compromise the device.
Accordingly, it would be advantageous to have a semiconductor with more robust protection.